Submissions from zipcpu.com

		Chasing resets (zipcpu.com)
		35 points by fayalalebrun on April 9, 2024 \| past \| 2 comments
		An Overview of a 10Gb Ethernet Switch (zipcpu.com)
		2 points by hasheddan on Nov 27, 2023 \| past
		Clock Gating (zipcpu.com)
		2 points by vonadz on Oct 27, 2021 \| past
		The FPGA Designer Who Didn't Get the Job (zipcpu.com)
		94 points by PaulHoule on July 22, 2021 \| past \| 78 comments
		Fixing Xilinx's Broken AXI-Lite Design in VHDL (zipcpu.com)
		1 point by todsacerdoti on May 23, 2021 \| past
		Lessons learned while building an ASIC design (zipcpu.com)
		12 points by stefanpie on May 13, 2021 \| past
		Clocks for Software Engineers (2017) (zipcpu.com)
		2 points by rudedogg on Feb 3, 2021 \| past
		Just how long does a formal proof take to finish? (zipcpu.com)
		1 point by matt_d on Aug 3, 2019 \| past
		Interpolation is just a special type of convolution (zipcpu.com)
		2 points by adamnemecek on July 20, 2019 \| past
		About the ZipCPU (zipcpu.com)
		178 points by peter_d_sherman on Oct 4, 2018 \| past \| 46 comments
		An Open Source Pipelined FFT Generator (zipcpu.com)
		42 points by matt_d on Oct 2, 2018 \| past \| 4 comments
		Pipelining a Prefetch (zipcpu.com)
		1 point by ingve on March 21, 2018 \| past
		Is formal really all that hard? (zipcpu.com)
		1 point by matt_d on March 15, 2018 \| past
		Building a prefetch module (zipcpu.com)
		31 points by secondary on Nov 21, 2017 \| past
		My first experience with Formal Methods (zipcpu.com)
		4 points by kasbah on Oct 21, 2017 \| past
		My first experience with formal methods (zipcpu.com)
		96 points by matt_d on Oct 20, 2017 \| past \| 19 comments
		Differences between FPGA and ASIC development (zipcpu.com)
		6 points by matt_d on Oct 13, 2017 \| past
		It's all about the interfaces (zipcpu.com)
		2 points by eaguyhn on Oct 8, 2017 \| past
		A CORDIC testbench (zipcpu.com)
		1 point by eaguyhn on Oct 5, 2017 \| past
		Clocks for Software Engineers (zipcpu.com)
		434 points by mr_tyzik on Sept 19, 2017 \| past \| 59 comments
		Using a CORDIC to calculate sines and cosines in an FPGA (zipcpu.com)
		1 point by _htpa on Sept 2, 2017 \| past
		Rules for new FPGA designers (zipcpu.com)
		190 points by jsnell on Aug 24, 2017 \| past \| 74 comments
		Minimizing FPGA Resource Utilization (zipcpu.com)
		73 points by jsnell on June 13, 2017 \| past \| 6 comments

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